-
本文对第四代双沟槽型碳化硅场效应晶体管开展了不同栅极偏置电压下的60Co-γ辐照实验, 并在辐照后进行了室温退火实验. 实验结果表明, 辐照后器件的阈值电压负向漂移, 且在正向栅极偏压下电学性能退化尤为明显. 通过分析器件的1/f噪声特性发现, 在不同栅极偏置条件下辐照后器件的漏极电流噪声归一化功率谱密度升高了4—9个数量级, 这表明辐照后器件内部缺陷密度显著增加. 对辐照后器件进行了24, 48和168 h的室温退火实验, 退火后器件阈值电压有所升高, 表明器件的电学性能在室温下可以部分恢复, 主要因为辐照产生的浅氧化物陷阱电荷在室温下退火, 而深氧化物陷阱电荷和界面陷阱电荷在室温难以恢复. 结合TCAD仿真模拟进一步分析器件总剂量效应微观机制. 结果表明, 辐照在氧化层中诱生的大量氧化物陷阱电荷造成栅极氧化层中靠近沟道一侧的电场强度增大, 导致器件的阈值电压负向漂移, 影响器件性能.In this work, the influence of 60Co-γ ray irradiation on double trench SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) is investigated under different conditions. First, the effects of the total ionizing dose (TID) on the electrical performance of the device at different gate bias voltages are studied. The results indicate that at 150 krad (Si) irradiation dose, the threshold voltage of the device after being irradiated decreases by 3.28 and 2.36 V for gate voltages of +5 and –5 V bias, respectively, whereas the threshold voltage of the device after being irradiated decreases by only 1.36 V for a gate voltage of 0 V bias. The threshold voltage of the device after irradiation drifts in the negative direction, and the degradation of the electrical performance is especially obvious under the positive gate bias. This is attributed to the increase in the number of charges trapped in the oxide layer. At the same time, room temperature annealing experiments are performed on the irradiated devices for 24, 48 and 168 h. The shallow oxide trap charges generated by irradiation are annealed at room temperature, while the deep oxide trap charges and interface trap charges are difficult to recover at room temperature, resulting in an increase in the threshold voltage of the devices after being annealed, indicating that the electrical properties of the devices can be partially recovered after being annealed at room temperature. In order to characterize the effect of 60Co-γ ray irradiation on the interfacial state defect density of the devices, low frequency noise (1/f) tests are performed at different doses and different gate bias voltages. The 1/f low frequency noise testing shows that under different bias voltages, the density of irradiation defects in the device increases due to the presence of induced oxide trap charges in the oxide layer of the device after being irradiated and the interfacial trap charges generated at the SiO2/SiC interface. This results in an increase of 4–9 orders of magnitude in the normalized power spectral density of the drain current noise of the irradiated device. To further ascertain the irradiation damage mechanism of the device, a numerical simulation is carried out using the TCAD simulation tool, and the results show that a large number of oxide trap charges induced by irradiation in the oxide layer cause an increase in the electric field strength in the gate oxide layer close to the trench side, which leads to a negative drift of the threshold voltage of the device and affects the performance of the device. The results of this work can provide important theoretical references for investigating the radiation effect mechanism and designing the anti radiation reinforcement of double trench SiC MOSFET devices.
-
Keywords:
- double-trench /
- silicon carbide /
- low-frequency noise /
- total ionizing dose effect
-
实验条件 VG = 0 V VG = –5 V VG = +5 V 50 krad(Si) –0.58 V –1.27 V –1.52 V 100 krad(Si) –1.07 V –1.54 V –2.15 V 150 krad(Si) –1.36 V –2.36 V –3.28 V 实验条件 VG = 0 V VG = –5 V VG = +5 V $N{\text{ot}}$/(1010 cm–2) 7.63 12.70 20.10× $N{\text{it}}$/(108 cm–2) 28.90 5.75 133.00 $N{\text{ot}}$/(1017 cm–3) 2.63 5.13 7.63 $\Delta V{\text{th}}$/V –0.969 –1.902 –2.826 -
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26]
计量
- 文章访问数: 433
- PDF下载量: 3
- 被引次数: 0